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M74HC7292
PROGRAMMABLE DIVIDER/TIMER
s
s
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HIGH SPEED : fMAX = 75 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4A(MAX.) at TA=25C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 7292
DIP
SOP
TSSOP
ORDER CODES
PACKAGE DIP SOP TSSOP TUBE M74HC7292B1R M74HC7292M1R T&R M74HC7292RM13TR M74HC7292TTR
DESCRIPTION The M74HC7292 is an high speed CMOS PROGRAMMABLE DIVIDER/TIMER fabricated with silicon gate C2MOS technology. This device is a programmable frequency divider and have two clock inputs, either one may be used for clock gating. (see the function table).The M74HC7292 can divide from 22 to 231. This
device feature an active-low clear input to initialize the state of all flip-flops. To facilitate incoming inspection, test points (TP1, TP2, TP3) are provided. All inputs are equipped with protection circuits against static discharge and transient excess voltage. This device have all outputs "Totem Pole"
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 2001
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M74HC7292
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 4, 5 1, 2, 10, 14, 15 3, 6, 13 11 7 8 16 SYMBOL NAME AND FUNCTION
CLK1, CLK2 Input Clock A to E TP1, TP2, TP3 CLR Q GND Vcc Program Inputs Test Point Outputs Clear (Active LOW) Output Ground (0V) Positive Supply Voltage
TRUTH TABLE
CLR L H H H H L H X X H NO CHANGE CLK1 X CLK2 X L Q OUTPUT MODE CLEARED TO L UP COUNT
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M74HC7292
FUNCTIONAL TABLE
PROGRAMMING INPUTS E L L L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H D L L L L L L L L H H H H H H H H L L L L L L L L H H H H H H H H C L L L L H H H H L L L L H H H H L L L L H H H H L L L L H H H H B L L H H L L H H L L H A BINARY L Inhibit H Inhibit L 22 H 23 L 24 H 25 L2 H
6
FREQUENCY DIVISION Q DECIMAL BINARY Inhibit Inhibit Inhibit Inhibit 4 29 8 29
9
TP1 DECIMAL BINARY Inhibit Inhibit Inhibit Inhibit 512 217 512 217
17
TP2 DECIMAL BINARY Inhibit Inhibit Inhibit Inhibit 131.072 224 131.072 224
24
TP3 DECIMAL Inhibit Inhibit 16.777.216 16.777.216 16.777.216 16.777.216 16.777.216 16.777.216 4 4 16 16 64 64 256 256 1.024 1.024 4.096 4.096 16.384 16.384 65.536 65.536 262.144 262.144 1.048.576 1.048.576 4.194.304 4.194.304 16.777.216 16.777.216
16 2
512 2
131.072 2
32 29 64 2 128 256
9
512 217 512 2 512 512
17
131.072 224 131.072 2 131.072 131.072
24
27
29 29
9 9
217 217
17 17
224 22
4 4
L 28 H 29 L2
10
512 29 1.024 2
512 217 512 2 512 2 512
131.072 22 131.072 2 131.072 2 131.072
H H 211 L L H H L L H H L L H H L L H H L L H H L 212 H 213 L 214 H 215 L2 H2
16 17
2.048 2 8.192 16.384
4.096 29 29 29
9 9
512 217 217 512 Disabled Low 512 Disabled Low 512 2 512 2 512
3 3
131.072 26 26 28 28 82 82 32
10 10
32.768 29 65.536 2 131.072 2 262.144
L 218 H 219 L2
20
29
9 9
25
7 7
212
14 14
524.288 29 1.048.576 2 2.097.152 2
512 25 512 2 512 2
32 212 128 2 128 2 512 2.048
H 221 L 222 H L 223 224
4.194.304 Disabled Low 8.388.608 Disabled Low 16.777.216 23
3
29 29 8 211
11
512 216 216 218
18
H 225 L 226 H 227 L 228 H 229 L2 H2
30 31
33.544.432 2
82
2.048 2
67.108.864 25 134.217.728 25 268.435.456 27
9 9
32 213 32 213 128 215
17 17
8.192 220 8.192 220 32.768 222
24 24
536.870.912 27 1.073.741.824 2 2.147.483.648 2
128 215 512 2 512 2
32.768 222 131.072 2 131.072 2
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M74HC7292
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
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M74HC7292
ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO IIK IOK IO PD Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Power Dissipation Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 20 25 50 500(*) -65 to +150 300 Unit V V V mA mA mA mA mW C C
ICC or IGND DC VCC or Ground Current
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 C; derate to 300mW by 10mW/C from 65C to 85C
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO Top tr, tf Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC = 2.0V VCC = 4.5V VCC = 6.0V Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to 125 0 to 1000 0 to 500 0 to 400 Unit V V V C ns ns ns
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M74HC7292
DC SPECIFICATIONS
Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 VOH High Level Output Voltage (TP) 2.0 4.5 6.0 4.5 6.0 VOL Low Level Output Voltage (Q) 2.0 4.5 6.0 4.5 6.0 VOL Low Level Output Voltage (TP) 2.0 4.5 6.0 4.5 6.0 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 IO=-20 A IO=-20 A IO=-20 A IO=-4.0 mA IO=-5.2 mA IO=-20 A IO=-20 A IO=-20 A IO=-1.0 mA IO=-1.3 mA IO=20 A IO=20 A IO=20 A IO=4.0 mA IO=5.2 mA IO=20 A IO=20 A IO=20 A IO=1.0 mA IO=1.3 mA VI = VCC or GND VI = VCC or GND TA = 25C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.18 5.68 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 0.1 0.1 0.1 0.26 0.26 0.1 4 1.9 4.4 5.9 4.13 5.63 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.33 0.33 0.1 0.1 0.1 0.33 0.33 1 40 Typ. Max. Value -40 to 85C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 0.1 0.1 0.1 0.40 0.40 1 80 A A V V V V Max. -55 to 125C Min. 1.5 3.15 4.2 0.5 1.35 1.8 Max. V Unit
VIH
High Level Input Voltage Low Level Input Voltage High Level Output Voltage (Q)
VIL
V
VOH
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M74HC7292
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 TA = 25C Min. Typ. 30 8 7 116 29 25 160 46 39 130 42 36 21 64 75 40 8 7 48 12 10 Max. 75 15 13 225 45 38 350 70 60 320 64 54 4 22 26 75 15 13 125 25 21 5 5 5 95 19 16 155 31 26 5 5 5 Value -40 to 85C Min. Max. 95 19 16 280 56 48 440 88 75 400 80 68 3.4 18 21 110 22 20 190 38 32 5 5 5 -55 to 125C Min. Max. 110 22 19 340 68 57 105 90 210 100 81 ns Unit
tTLH tTHL Output Transition Time (Q) tTLH tTHL Output Transition Time (TP) tPLH tPHL Propagation Delay Time (CLK - Q) tPHL Propagation Delay Time (CLR - Q) Maximum Clock Frequency Minimum Pulse Width (CLK) Minimum Pulse Width (CLR) Minimum Removal Time
ns
ns
ns
fMAX
5.0 27 32
MHz
tW(L) tW(H) tW(L)
ns
ns
tREM
ns
CAPACITIVE CHARACTERISTICS
Test Condition Symbol Parameter VCC (V) 5.0 5.0 TA = 25C Min. Typ. 5 21 Max. 10 Value -40 to 85C Min. Max. 10 -55 to 125C Min. Max. 10 pF pF Unit
CIN CPD
Input Capacitance Power Dissipation Capacitance (note 1)
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
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M74HC7292
TEST CIRCUIT
CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50)
SWITCHING CHARACTERISTICS TEST WAVEFORM (f=1MHz; 50% duty cycle)
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M74HC7292
Plastic DIP-16 (0.25) MECHANICAL DATA
mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.27 8.5 2.54 17.78 7.1 5.1 0.130 0.050 0.51 0.77 0.5 0.25 20 0.335 0.100 0.700 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.030 0.020 0.010 0.787 0.065 TYP. MAX. inch
P001C
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M74HC7292
SO-16 MECHANICAL DATA
DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8 (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45 (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010
PO13H
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M74HC7292
TSSOP16 MECHANICAL DATA
mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8 0.75 0 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.201 0.260 0.176 inch
A
A2 A1 b e K c L E
D
E1
PIN 1 IDENTIFICATION
1
0080338D
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M74HC7292
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom (c) http://www.st.com
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